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HMC840LP6CE

Fractional-N PLL with Integrated VCO SMT, 1.31 - 5.66 GHz

Product Details

Data Sheet
Operating Guide
Application Notes
Package Layout
Tape & Reel
ECCN: 3A001.a.11.b

Quality & Reliability

Environmental Data Sheet
Qualification Test Reports

Press & Media

Product Press Release

Product Support

User's Manual
Eval. PCB Schematic
Software Download
Freq. (MHz)
Function
Closed Loop SSB PN @ 10kHz Offset
Open Loop VCO PN @ 1MHz Offset
Pout (dBm)
RMS Jitter Frac. Mode (fs)
Int. PN Frac. Mode
(deg rms)
Package

fo/2

              
1310 - 1415 Tri-Band RF VCO -121 dBc/Hz -145 dBc/Hz 10 180 0.09 LP6C

fo

              
2620 - 2830 Tri-Band RF VCO -118 dBc/Hz -139 dBc/Hz 9 180 0.18 LP6C

2fo

              
5240 - 5660 Tri-Band RF VCO -112 dBc/Hz -133 dBc/Hz -3 180 0.37 LP6C

Features

• Ultra Low Phase Noise
   -112 dBc/Hz in Band Typ.
• Figure of Merit (FOM)
   -230 dBc Integer
• <180 fs RMS Jitter
• 24-Bit Step Size, 3 Hz Resolution Typ.
• Exact Frequency Mode
• Built in Digital Self Test
• 40 Lead 6x6mm SMT Package: 36mm²

Typical Applications

• Cellular/4G Infrastructure
• Repeaters & Femtocells
• Communications
   Test Equipment
• CATV Equipment
• Phased Array Applications
• DDS Replacement
• Very High Data Rate Radios

Functional Diagram

General Description

The HMC840LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The synthesizer consists of an integrated low noise VCO with a triband output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.


The fractional synthesizer features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.


For theory of operation and register map refer to the "PLLs with Integrated VCO - RF VCOs" Operating Guide.