HMC838LP6CE

Features

• RF Bandwidth: 795 - 945,
   1590 - 1890, 3180 - 3780 MHz
• Fractional or Integer Modes
• 19-Bit Prescaler
• Ultra Low Phase Noise
   -111 dBc/Hz in Band Typ.
• Figure of Merit (FOM)
   -230 dBc Integer
• 24-Bit Step Size, 3 Hz Resolution Typ.
• 200 MHz, 14-bit Reference Path Input
• Cycle Slip Prevention
• 40 Lead 6x6mm SMT Package: 36mm²

Typical Applications

• Cellular/4G Infrastructure
• Repeaters and Femtocells
• Communications Test Equipment
• CATV Equipment
• Phased Array Applications
• DDS Replacement
• Very High Data Rate Radios

Functional Diagram

General Description

The HMC838LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The synthesizer consists of an integrated low noise VCO with a triband output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.

The fractional synthesizer features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.

For theory of operation and register map refer to the "PLLs w/ Integrated VCO - RF VCOs" Operating Guide.