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High Speed Latched Comparator-RSECL SMT, 10 GHz

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Analog Input Bandwidth (GHz) Function Deter-
ministic Jitter (ps)
DC Power Consumption (mW) Vcci, Vcco, Vterm, Vee Power Supply (Vdc) Package
10 Latched Comparator-RSECL 2 120 +3.3, 0, -2, -3 LC3C


  • Propagation Delay: 100 ps
  • Overdrive & Slew Rate Dispersion: 10 ps
  • Minimum Pulse Width: 60 ps
  • Resistor Programmable Hysteresis
  • Differential Latch Control
  • Active Gain: 45 dB
  • Power Dissipation: 120 mW
  • RSCML and RSPECL Versions Available
  • 16 Lead Ceramic 3x3mm
    SMT Package: 9mm²

Typical Applications

• ATE Applications
• High Speed Instrumentation
• Digital Receiver Systems
• Pulse Spectroscopy
• High Speed Trigger Circuits
• Clock & Data Restoration

Functional Diagram

HMC676LC3C Functional Diagram

General Description

The HMC676LC3C is a SiGe monolithic, ultra fast comparator which features reduced swing ECL output drivers and latch inputs. The comparator supports 10 Gbps operation while providing 100 ps propagation delay and 60 ps minimum pulse width with 0.2 ps rms random jitter (RJ).

Overdrive and slew rate dispersion are typically 10 ps, making the device ideal for a wide range of applications from ATE to broadband communications. The reduced swing ECL output stage is designed to directly drive 400 mV into 50 Ohms terminated to -2V. The HMC676LC3C features high speed latch and programmable hysteresis and may be configured to operate in either latch mode, or as a tracking comparator.