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HMC564

Low Noise Amplifier Chip, 7.0 - 13.5 GHz

Product Details

Data Sheet
Application Notes
S-Parameters
ECCN: EAR99

Quality & Reliability

Qualification Test Reports
Waffle-Pak & Gel-Pak

Press & Media
Freq. (GHz) Function Gain (dB) OIP3 (dBm) NF (dB) P1dB (dBm) Bias Supply Package
7.0 - 13.5 Low Noise 17 24 1.8 12 +3V @ 51mA Chip

Features

• Noise Figure: 1.8 dB
• Gain: 17 dB
• OIP3: 24 dBm
• Single Supply: +3V @ 51 mA
• 50 Ohm Matched Input/Output
• Small Size: 1.96 x 0.98 x 0.10 mm

Typical Applications

• Point-to-Point Radios
• Point-to-Multi-Point Radios
• Test Equipment and Sensors
• Military & Space

Functional Diagram

General Description

The HMC564 is a high dynamic range GaAs PHEMT MMIC Low Noise Amplifier (LNA) chip which operates from 7 to 13.5 GHz. The HMC564 features extremely fl at performance characteristics including 17 dB of small signal gain, 1.8 dB of noise figure and output IP3 of 24 dBm across the operating band. This self- biased LNA is ideal for hybrid and MCM assemblies due to its compact size, consistent output power, single +3V supply operation, and DC blocked RF I/O’s. All data is measured with the chip in a 50 Ohm test fixture connected via two 0.025 mm (1 mil) diameter bondwires of minimal length 0.31 mm (12 mil).