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HMC539LP3 / HMC539LP3E

0.25 dB LSB 5-Bit Digital Attenuator SMT, DC - 4 GHz

Product Details

Data Sheet
Application Notes
Package Layout
S-Parameters
Tape & Reel
ECCN: EAR99

Quality & Reliability

Environmental Data Sheet
Qualification Test Reports

Press & Media

Product Press Release

Life Cycle Status

Production, Recommended for New Designs
Freq. (GHz) Function Loss (dB) Atten. Range (dB) IIP3 (dBm) Control Input (Vdc) Package
DC - 4 5-Bit Digital 0.7 0.25 to 7.75 50 TTL / CMOS LP3


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Features

• 0.25 dB LSB Steps to 7.75 dB
• ±0.05 dB Typical Step Error
• Low Insertion Loss: 0.7 dB
• High IP3: +50 dBm
• Single Control Line Per Bit
• TTL/CMOS Compatible Control
• Single +5V Supply
• 3x3 mm SMT Package

Typical Applications

• Cellular Infrastructure
• ISM, MMDS, WLAN, WiMAX, WiBro
• Microwave Radio & VSAT
• Test Equipment and Sensors

Functional Diagram

HMC539LP3 Functional Diagram

General Description

The HMC539LP3(E) is a broadband 5-bit GaAs IC digital attenuator in low cost leadsurface mount package. This single positive control line per bit digital attenuator utilizes an off chip AC ground capacitor for near DC operation, making it suitable for a wide variety of RF and IF applications. Covering DC to 4.0 GHz, the insertion loss is less than 0.7 dB typical. The attenuator bit values are 0.25 (LSB), 0.5, 1, 2, and 4 dB for a total attenuation of 7.75 dB. Attenuation accuracy is excellent at ± 0.05 dB typical step error. The attenuator also features a high IIP3 of +50 dBm. Five TTL/CMOS control inputs are used to select each attenuation state. A single Vdd bias of +5V is required.